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MOS6502.cpu increasing of program counter slightly modified, fixed some minor bugs. MOS6502.cpu tests updated to be cleaner and clearer and include from flag testing in the existing ADC/SBC tests.

master
Bryan Miller 5 年之前
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共有 2 個檔案被更改,包括 109 行新增91 行删除
  1. +8
    -4
      src/MOS6502/cpu.js
  2. +101
    -87
      test/unit.src.MOS6502.cpu.spec.js

+ 8
- 4
src/MOS6502/cpu.js 查看文件

@@ -19,8 +19,9 @@ function ProcessOp(cpu, mode){
switch(cpu.__cycle){
case 0:
if (mode === 0){
cpu.__mem.address = cpu.__PC;
PCUp(cpu, 1);
cpu.__mem.address = cpu.__PC;
//PCUp(cpu, 1);
cpu.__opv = cpu.__mem.byte;
}
return (mode === 0 || mode === 9);
@@ -36,8 +37,9 @@ function ProcessOp(cpu, mode){
case 4: // Absolute
case 5: // Absolute, X
case 6: // Absolute, Y
cpu.__mem.address = cpu.__PC;
PCUp(cpu, 1);
cpu.__mem.address = cpu.__PC;
//PCUp(cpu, 1);
cpu.__opv |= cpu.__mem.byte << 8;
break;
case 7: // Indirect, X
@@ -111,7 +113,7 @@ function ProcessOp(cpu, mode){
}


function ADC(cpu){ // To be used by both the ADC and SBC op codes.
function ADC(cpu){
let pmode = [0x69, 0x65, 0x75, null, 0x6D, 0x7D, 0x79, 0x61, 0x71, null].indexOf(cpu.__op);
if (ProcessOp(cpu, pmode) === true){
cpu.__op = -1;
@@ -922,7 +924,7 @@ class CPU{
this.__cycle = 0;
this.__mem.address = this.__PC;
this.__op = this.__mem.byte;
PCUp(this, 1);
//PCUp(this, 1);
}
} else {
switch(this.__op){
@@ -993,6 +995,8 @@ class CPU{
case 0x84: case 0x94: case 0x8C:
STY(this); break;
}
if (this.__op < 0)
PCUp(this, 1);
}
}).bind(this);
}

+ 101
- 87
test/unit.src.MOS6502.cpu.spec.js 查看文件

@@ -89,100 +89,114 @@ describe("Testing MOS6502 CPU...", function(){
});

describe("Testing ADC...", function(){
it("ADC Immediate", function(){
let prg = "CLC\n";
prg += "CLV\n";
prg += "CLD\n";
prg += "CLI\n";
prg += "LDA #$00\n";
prg += "ADC #$01\n";
prg += "ADC #$01\n";
asm.reset().compile(prg);
cpu.memory.clearPage(0);
cpu.memory.load(0, asm.result());
cpu.reset = true;
tick();
// Getting through the 4 clear flag calls. Each should take 2 ticks.
tick(); tick(); tick(); tick(); tick(); tick(); tick(); tick();
// Next two ticks for the LDA call
tick(); tick();
// Now processing the adds.
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(1);
tick();
expect(cpu.A).to.equal(1);
tick();
expect(cpu.A).to.equal(2);
});
describe("ADC Binary Mode...", function(){
it("ADC Immediate", function(){
let prg = "CLC\n";
prg += "CLV\n";
prg += "CLD\n";
prg += "CLI\n";
prg += "LDA #$00\n";
prg += "ADC #$01\n";
prg += "ADC #$01\n";
asm.reset().compile(prg);
cpu.memory.clearPage(0);
cpu.memory.load(0, asm.result());
cpu.reset = true;
tick(); // To reset;
while (cpu.PC !== 10){
switch(cpu.PC){
case 6:
expect(cpu.A).to.equal(0); break;
case 8:
expect(cpu.A).to.equal(1); break;
case 10:
expect(cpu.A).to.equal(2); break;
}
tick();
}
});

it("ADC Zero Page");
it("ADC Zero Page, X");
it("ADC Absolute");
it("ADC Absolute, X");
it("ADC Absolute, Y");
it("ADC Indirect, X");
it("ADC Indirect, Y");
it("ADC Zero Page");
it("ADC Zero Page, X");
it("ADC Absolute");
it("ADC Absolute, X");
it("ADC Absolute, Y");
it("ADC Indirect, X");
it("ADC Indirect, Y");
});

it ("ADC Test Zero flag"/*, function(){
cpu.memory.clearPage(0);
cpu.memory.load(0, [0x18, 0xB8, 0xD8, 0x58, 0x69, 0xFF, 0x69, 0x01]);
// Getting through the 4 clear flag calls. Each should take 2 ticks.
tick(); tick(); tick(); tick(); tick(); tick(); tick(); tick();
// Now processing the adds.
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(1);
tick();
expect(cpu.A).to.equal(1);
tick();
expect(cpu.A).to.equal(2);
}*/);
describe("ADC Decimal (BCD) Mode...", function(){
it("ADC Immediate");
it("ADC Zero Page");
it("ADC Zero Page, X");
it("ADC Absolute");
it("ADC Absolute, X");
it("ADC Absolute, Y");
it("ADC Indirect, X");
it("ADC Indirect, Y");
});
});

describe("Testing SBC...", function(){
it("SBC Immediate", function(){
let prg = "SEC\n";
prg += "CLV\n";
prg += "CLD\n";
prg += "CLI\n";
prg += "LDA #$00\n";
prg += "SBC #$01\n";
prg += "SEC\n";
prg += "SBC #$01";
asm.reset().compile(prg);
cpu.memory.clearPage(0);
cpu.memory.load(0, asm.result());
cpu.reset = true;
tick();
// Getting through the 1 set and 3 clear flag calls. Each should take 2 ticks.
tick(); tick(); tick(); tick(); tick(); tick(); tick(); tick();
// Next two ticks for the LDA call
tick(); tick();
// Now processing the subtractions.
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(0);
tick();
expect(cpu.A).to.equal(0xFF);
tick(); tick(); // Get through second SEC call.
tick();
expect(cpu.A).to.equal(0xFF);
tick();
expect(cpu.A).to.equal(0xFE);
describe("SBC Binary Mode...", function(){
it("SBC Immediate", function(){
let prg = "SEC\n";
prg += "CLV\n";
prg += "CLD\n";
prg += "CLI\n";
prg += "LDA #$01\n";
prg += "SBC #$01\n";
prg += "SBC #$01";
asm.reset().compile(prg);
cpu.memory.clearPage(0);
cpu.memory.load(0, asm.result());
cpu.reset = true;
tick(); // To reset;
while(cpu.PC !== 11){
// NOTE TO SELF: Depending on the OP code, these tests could be
// checked multiple times, as the cpu may sit at a program cntr
// for a couple cycles depending on the OP.
switch(cpu.PC){
case 1:
expect(cpu.C).to.be.equal(1); break;
case 6:
expect(cpu.A).to.be.equal(0x01); break;
case 8:
expect(cpu.A).to.be.equal(0x00);
expect(cpu.C).to.be.equal(1);
expect(cpu.Z).to.be.equal(1);
expect(cpu.N).to.be.equal(0);
break;
case 9:
expect(cpu.A).to.be.equal(0xFF);
expect(cpu.C).to.be.equal(0);
expect(cpu.Z).to.be.equal(0);
expect(cpu.N).to.be.equal(1);
break;
}
tick();
}
});

it("SBC Zero Page");
it("SBC Zero Page, X");
it("SBC Absolute");
it("SBC Absolute, X");
it("SBC Absolute, Y");
it("SBC Indirect, X");
it("SBC Indirect, Y");
});

it("SBC Zero Page");
it("SBC Zero Page, X");
it("SBC Absolute");
it("SBC Absolute, X");
it("SBC Absolute, Y");
it("SBC Indirect, X");
it("SBC Indirect, Y");
describe("SBC Decimal (BCD) Mode...", function(){
it("SBC Immediate");
it("SBC Zero Page");
it("SBC Zero Page, X");
it("SBC Absolute");
it("SBC Absolute, X");
it("SBC Absolute, Y");
it("SBC Indirect, X");
it("SBC Indirect, Y");
});
});
});


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