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@@ -36,12 +36,28 @@ class MMC extends IMem{ |
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this.__sidx = 0; |
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} |
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get pages(){ |
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return this.__switches.reduce((acc, s)=>{ |
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return acc + s.mem.pages; |
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}, 0); |
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} |
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get size(){ |
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return this.__switches.reduce((acc, s)=>{ |
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acc += s.mem.size; |
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return acc + s.mem.size; |
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}, 0); |
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} |
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get writable(){ |
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let iw = false; |
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for (let i=0; i < this.__switches.length; i++){ |
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if (this.__switches[i].mem.writable){ |
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iw = true; break; |
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} |
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} |
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return iw; |
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} |
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get switches(){return this.__switches.length;} |
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get address(){return this.__addr;} |
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@@ -68,6 +84,45 @@ class MMC extends IMem{ |
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} |
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} |
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load(addr, data){ |
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if (addr < 0 || addr > this.size) |
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throw new RangeError("Memory address out of range."); |
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let offset = 0; |
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for (let i = 0; i < this.__switches.length; i++){ |
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let mem = this.__switches[i].mem; |
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let od = data; |
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if (addr >= offset && addr < offset + mem.size){ |
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if ((addr - offset) + d.length >= mem.size) |
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od = data.slice(0, mem.size); |
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mem.load(addr - offset, od); |
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} |
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data = data.slice(mem.size); |
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offset += mem.size; |
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if (d.length > 0) |
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addr = offset; |
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} |
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return this; |
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} |
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clearPage(paddr){ |
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for (let i=0; i < this.__switches.length; i++){ |
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let pgs = this.__switches[i].mem.pages; |
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if (paddr < pgs){ |
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this.__switches[i].mem.clearPage(addr); |
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break; |
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} |
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paddr -= pgs; |
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} |
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return this; |
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} |
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clear(){ |
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this.__switches.forEach((s)=>{ |
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s.clear(); |
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}); |
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return this; |
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} |
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connectMemory(mem, addroff){ |
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addroff = (typeof(addroff) === 'number' && addroff >= 0) ? addroff : -1; |
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if (addroff < 0 || addroff === this.size){ |