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Enhanced ALU with BCD mode and fixed ADC/SBC flag results.

master
Bryan Miller 5 jaren geleden
bovenliggende
commit
55bde60f14
1 gewijzigde bestanden met toevoegingen van 55 en 17 verwijderingen
  1. +55
    -17
      src/MOS6502/cpu.js

+ 55
- 17
src/MOS6502/cpu.js Bestand weergeven

@@ -721,23 +721,61 @@ function MemAddrFrom(cpu, addr){
}

function ALU(cpu, m, b){
switch(m){
case 0: // Addition
cpu.__AR = (cpu.__AR + b) + ((cpu.C === 1) ? 1 : 0);
//cpu.C = (this.__AR >= 256);
break;
case 1: // Subtraction
cpu.__AR = (cpu.__AR - b) - ((cpu.C === 0) ? 1 : 0);
//cpu.C = (this.__AR >= 0);
cpu.__AR += (cpu.__AR < 0) ? 256 : 0;
break;
}
cpu.V = (BITM.isOn(cpu.__AR, 7) === BITM.isOn(b, 7)) && (BITM.val(cpu.__AR, 7) !== BITM.val(cpu.__AR, 7));
cpu.C = (m === 0) ? (this.__AR >= 256) : (cpu.V === 0);
cpu.N = BITM.val(cpu.__AR, 7);
cpu.__AR &= 0xFF;
cpu.Z = (cpu.__AR === 0);
let A = 0;
let IAR = cpu.__AR;
if (cpu.D === 0){ // Binary Mode
switch(m){
case 0: // Addition
A = (cpu.__AR + b) + ((cpu.C === 1) ? 1 : 0);
//cpu.C = (this.__AR >= 256);
break;
case 1: // Subtraction
A = (cpu.__AR - b) - ((cpu.C === 0) ? 1 : 0);
//cpu.C = (this.__AR >= 0);
A += (A < 0) ? 256 : 0;
break;
}
cpu.__AR = A & 0xFF;

// Both inputs have the same sign, but the output doesn't match the sign of the input.
// (Twos Compliment)
cpu.V = ((IAR & 0x80) === (b & 0x80)) && ((IAR & 0x80) !== (cpu.__AR & 0x80));
//cpu.V = (BITM.isOn(cpu.__AR, 7) === BITM.isOn(b, 7)) && (BITM.val(cpu.__AR, 7) !== BITM.val(cpu.__AR, 7));
cpu.C = (m === 0) ? (A >= 256) : (cpu.V === 0);
cpu.N = BITM.isOn(cpu.__AR, 7);
//cpu.__AR &= 0xFF;
cpu.Z = (cpu.__AR === 0);
} else { // Decimal (BCD) Mode
// Borrowed from information located on...
// http://www.6502.org/tutorials/decimal_mode.html
let AL = 0;
switch(m){
case 0: // Addition
AL = (cpu.__AR & 0x0F) + (b & 0x0F) + ((cpu.C === 1) ? 1 : 0);
AL = (AL < 0x0A) ? AL : ((AL + 0x06) & 0x0F) + 0x10;
A = (cpu.__AR & 0xF0) + (b & 0xF0) + AL;
A += (A >= 0xA0) ? 0x60 : 0;
cpu.__AR = A & 0xFF;
cpu.C = (A >= 0x100);
cpu.N = (BITM.isOn(A, 7)) ? 1 : 0;
cpu.V = (A >= -128 && A <= 127) ? 0 : 1;
break;
case 1: // Subtraction
AL = (cpu.__AR & 0x0F) - (b & 0x0F) + (cpu.C - 1);
AL = (AL >= 0) ? AL : ((AL - 0x06) & 0x0F) - 0x10;
A = (A & 0xF0) - (b & 0xF0) + AL;
A -= (A >= 0) ? 0 : 0x60;
cpu.__AR = A & 0xFF;

cpu.V = ((IAR & 0x80) === (b & 0x80)) && ((IAR & 0x80) !== (cpu.__AR & 0x80));
cpu.C = (cpu.V === 0);
cpu.N = BITM.isOn(cpu.__AR, 7);
cpu.Z = (cpu.__AR === 0);
break;
}
}
return cpu.__AR;
}


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