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master
Bryan Miller 5 years ago
parent
commit
2433ed5e8f
1 changed files with 51 additions and 2 deletions
  1. +51
    -2
      src/chip/MOS6502/cpu.js

+ 51
- 2
src/chip/MOS6502/cpu.js View File

@@ -22,7 +22,45 @@ function BIT(cpu){
}

function BRANCH(cpu){

switch(cpu.__step){
case 0:
cpu.__mem.address = this.__PC;
let v = cpu.__mem.byte;
cpu.__opv = v;
break;
case 1:
let branch = false;
switch(cpu.__op){
case 0x10: // BPL
branch = (cpu.N === 0); break;
case 0x30: // BMI
branch = (cpu.N === 1); break;
case 0x50: // BVC
branch = (cpu.V === 0); break;
case 0x70: // BVS
branch = (cpu.V === 1); break;
case 0x90: // BCC
branch = (cpu.C === 0); break;
case 0xB0: // BCS
branch = (cpu.C === 1); break;
case 0xD0: // BNE
branch = (cpu.Z === 0); break;
case 0xF0: // BEQ
branch = (cpu.Z === 1); break;
}
if (branch === false)
PCUp(cpu, 1);
case 2:
if (cpu.__step === 2){
if (cpu.__opv > 128){
PCDown(cpu, 255 - cpu.__opv);
} else {
PCUp(cpu, cpu.__opv);
}
}
cpu.__op = -1;
}
cpu.__step += 1;
}

function BRK(cpu){
@@ -201,12 +239,22 @@ class CPU{
// ----------------------------------------
// CPU Registers. Here for debug purposes.
get PC(){return this.__PC;}
get P(){return this.__SR;}
get P(){return this.__PR;}
get X(){return this.__XR;}
get Y(){return this.__YR;}
get A(){return this.__AR;}

// ----------------------------------------
// Quick Flag Access
get N(){return (BIT.isOn(this.__PR, 0)) ? 1 : 0;}
get V(){return (BIT.isOn(this.__PR, 1)) ? 1 : 0;}
get B(){return (BIT.isOn(this.__PR, 3)) ? 1 : 0;}
get D(){return (BIT.isOn(this.__PR, 4)) ? 1 : 0;}
get I(){return (BIT.isOn(this.__PR, 5)) ? 1 : 0;}
get Z(){return (BIT.isOn(this.__PR, 6)) ? 1 : 0;}
get C(){return (BIT.isOn(this.__PR, 7)) ? 1 : 0;}

// ----------------------------------------
// Hardware interrupt triggers. Settable only.
set NMI(n){
this.__nmi = (n === true);
@@ -254,6 +302,7 @@ class CPU{
}
} else {
this.__step = 0;
this.__mem.address = this.__PC;
this.__op = this.__mem.byte;
PCUp(this, 1);
}

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